cfn_hal_eth.h

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#ifndef CAFFEINE_HAL_HAL_ETH_H
#define CAFFEINE_HAL_HAL_ETH_H
 
#ifdef __cplusplus
extern "C"
{
#endif
 
/* Includes ---------------------------------------------------------*/
#include "cfn_hal.h"
#include "cfn_hal_base.h"
#include "cfn_hal_gpio.h"
#include "cfn_hal_types.h"
 
/* Defines ----------------------------------------------------------*/
 
#define CFN_HAL_ETH_PHY_REG_BMCR   0x00U 
#define CFN_HAL_ETH_PHY_REG_BSR    0x01U 
#define CFN_HAL_ETH_PHY_REG_ID1    0x02U 
#define CFN_HAL_ETH_PHY_REG_ID2    0x03U 
#define CFN_HAL_ETH_PHY_REG_ANAR   0x04U 
#define CFN_HAL_ETH_PHY_REG_ANLPAR 0x05U 
#define CFN_HAL_ETH_PHY_REG_ANER   0x06U 
#define CFN_HAL_ETH_PHY_BMCR_RESET     CFN_HAL_BIT(15) 
#define CFN_HAL_ETH_PHY_BMCR_LOOPBACK  CFN_HAL_BIT(14) 
#define CFN_HAL_ETH_PHY_BMCR_SPEED_100 CFN_HAL_BIT(13) 
#define CFN_HAL_ETH_PHY_BMCR_AUTONEG   CFN_HAL_BIT(12) 
#define CFN_HAL_ETH_PHY_BMCR_POWERDOWN CFN_HAL_BIT(11) 
#define CFN_HAL_ETH_PHY_BMCR_ISOLATE   CFN_HAL_BIT(10) 
#define CFN_HAL_ETH_PHY_BMCR_RESTART   CFN_HAL_BIT(9)  
#define CFN_HAL_ETH_PHY_BMCR_DUPLEX    CFN_HAL_BIT(8)  
#define CFN_HAL_ETH_PHY_BSR_100BASET4  CFN_HAL_BIT(15) 
#define CFN_HAL_ETH_PHY_BSR_100BASEXFD CFN_HAL_BIT(14) 
#define CFN_HAL_ETH_PHY_BSR_100BASEXHD CFN_HAL_BIT(13) 
#define CFN_HAL_ETH_PHY_BSR_10BASETFD  CFN_HAL_BIT(12) 
#define CFN_HAL_ETH_PHY_BSR_10BASETHD  CFN_HAL_BIT(11) 
#define CFN_HAL_ETH_PHY_BSR_AUTONEGCMP CFN_HAL_BIT(5)  
#define CFN_HAL_ETH_PHY_BSR_REMOTEFLT  CFN_HAL_BIT(4)  
#define CFN_HAL_ETH_PHY_BSR_AUTONEGABL CFN_HAL_BIT(3)  
#define CFN_HAL_ETH_PHY_BSR_LINKSTAT   CFN_HAL_BIT(2)  
#define CFN_HAL_ETH_PHY_BSR_JABBERDET  CFN_HAL_BIT(1)  
#define CFN_HAL_ETH_PHY_BSR_EXTENDED   CFN_HAL_BIT(0)  
#define CFN_HAL_ETH_PHY_ANAR_NEXT_PAGE CFN_HAL_BIT(15) 
#define CFN_HAL_ETH_PHY_ANAR_REM_FAULT CFN_HAL_BIT(13) 
#define CFN_HAL_ETH_PHY_ANAR_PAUSE     CFN_HAL_BIT(10) 
#define CFN_HAL_ETH_PHY_ANAR_100T4     CFN_HAL_BIT(9)  
#define CFN_HAL_ETH_PHY_ANAR_100FD     CFN_HAL_BIT(8)  
#define CFN_HAL_ETH_PHY_ANAR_100HD     CFN_HAL_BIT(7)  
#define CFN_HAL_ETH_PHY_ANAR_10FD      CFN_HAL_BIT(6)  
#define CFN_HAL_ETH_PHY_ANAR_10HD      CFN_HAL_BIT(5)  
#define CFN_HAL_ETH_PHY_ANAR_SELECTOR  0x001FU         
/* Types Enums ------------------------------------------------------*/
 
typedef enum
{
    CFN_HAL_ETH_EVENT_NONE        = 0,
    CFN_HAL_ETH_EVENT_RX_COMPLETE = CFN_HAL_BIT(0), 
    CFN_HAL_ETH_EVENT_TX_COMPLETE = CFN_HAL_BIT(1), 
    CFN_HAL_ETH_EVENT_LINK_UP     = CFN_HAL_BIT(2), 
    CFN_HAL_ETH_EVENT_LINK_DOWN   = CFN_HAL_BIT(3), 
} cfn_hal_eth_event_t;
 
typedef enum
{
    CFN_HAL_ETH_ERROR_NONE    = 0,
    CFN_HAL_ETH_ERROR_MAC     = CFN_HAL_BIT(0), 
    CFN_HAL_ETH_ERROR_PHY     = CFN_HAL_BIT(1), 
    CFN_HAL_ETH_ERROR_GENERAL = CFN_HAL_BIT(2), 
} cfn_hal_eth_error_t;
 
typedef enum
{
    CFN_HAL_ETH_LINK_SPEED_10M,   
    CFN_HAL_ETH_LINK_SPEED_100M,  
    CFN_HAL_ETH_LINK_SPEED_1000M, 
} cfn_hal_eth_link_speed_t;
 
typedef enum
{
    CFN_HAL_ETH_LINK_DUPLEX_HALF, 
    CFN_HAL_ETH_LINK_DUPLEX_FULL, 
} cfn_hal_eth_link_duplex_t;
 
/* Types Structs ----------------------------------------------------*/
 
typedef struct
{
    bool                      is_up;  
    cfn_hal_eth_link_speed_t  speed;  
    cfn_hal_eth_link_duplex_t duplex; 
} cfn_hal_eth_link_status_t;
 
typedef struct
{
    uint8_t  mac_addr[6]; 
    uint16_t phy_addr;    
    void    *user_config; 
} cfn_hal_eth_config_t;
 
typedef struct
{
    void                      *instance; 
    cfn_hal_gpio_pin_handle_t *ref_clk;  
    cfn_hal_gpio_pin_handle_t *mdio;     
    cfn_hal_gpio_pin_handle_t *mdc;      
    cfn_hal_gpio_pin_handle_t *crs_dv;   
    cfn_hal_gpio_pin_handle_t *rxd0;     
    cfn_hal_gpio_pin_handle_t *rxd1;     
    cfn_hal_gpio_pin_handle_t *tx_en;    
    cfn_hal_gpio_pin_handle_t *txd0;     
    cfn_hal_gpio_pin_handle_t *txd1;     
    void                      *user_arg; 
} cfn_hal_eth_phy_t;
 
typedef struct cfn_hal_eth_s     cfn_hal_eth_t;
typedef struct cfn_hal_eth_api_s cfn_hal_eth_api_t;
 
typedef void (*cfn_hal_eth_callback_t)(cfn_hal_eth_t *driver, uint32_t event_mask, uint32_t error_mask, void *user_arg);
 
struct cfn_hal_eth_api_s
{
    cfn_hal_api_base_t base;
 
    /* Ethernet Specific Extensions */
    cfn_hal_error_code_t (*start)(cfn_hal_eth_t *driver);
    cfn_hal_error_code_t (*stop)(cfn_hal_eth_t *driver);
    cfn_hal_error_code_t (*transmit_frame)(cfn_hal_eth_t *driver,
                                           const uint8_t *frame,
                                           size_t         length,
                                           uint32_t       timeout);
    cfn_hal_error_code_t (*receive_frame)(
        cfn_hal_eth_t *driver, uint8_t *buffer, size_t max_length, size_t *received_length, uint32_t timeout);
    cfn_hal_error_code_t (*read_phy_reg)(
        cfn_hal_eth_t *driver, uint16_t phy_addr, uint16_t reg_addr, uint16_t *value, uint32_t timeout);
    cfn_hal_error_code_t (*write_phy_reg)(
        cfn_hal_eth_t *driver, uint16_t phy_addr, uint16_t reg_addr, uint16_t value, uint32_t timeout);
    cfn_hal_error_code_t (*get_link_status)(cfn_hal_eth_t *driver, cfn_hal_eth_link_status_t *status, uint32_t timeout);
};
 
CFN_HAL_VMT_CHECK(struct cfn_hal_eth_api_s);
 
CFN_HAL_CREATE_DRIVER_TYPE(eth, cfn_hal_eth_config_t, cfn_hal_eth_api_t, cfn_hal_eth_phy_t, cfn_hal_eth_callback_t);
/* Functions inline ------------------------------------------------- */
CFN_HAL_INLINE void cfn_hal_eth_populate(cfn_hal_eth_t              *driver,
                                         uint32_t                    peripheral_id,
                                         struct cfn_hal_clock_s     *clock,
                                         void                       *dependency,
                                         const cfn_hal_eth_api_t    *api,
                                         const cfn_hal_eth_phy_t    *phy,
                                         const cfn_hal_eth_config_t *config,
                                         cfn_hal_eth_callback_t      callback,
                                         void                       *user_arg)
{
    CFN_HAL_POPULATE_DRIVER(
        driver, CFN_HAL_PERIPHERAL_TYPE_ETH, peripheral_id, clock, dependency, api, phy, config, callback, user_arg);
}
 
CFN_HAL_INLINE cfn_hal_error_code_t cfn_hal_eth_config_validate(const cfn_hal_eth_t        *driver,
                                                                const cfn_hal_eth_config_t *config)
{
    if (driver == NULL || config == NULL)
    {
        return CFN_HAL_ERROR_BAD_PARAM;
    }
 
    if (config->phy_addr >= 32)
    {
        return CFN_HAL_ERROR_BAD_CONFIG;
    }
 
    return cfn_hal_base_config_validate(&driver->base, CFN_HAL_PERIPHERAL_TYPE_ETH, config);
}
 
CFN_HAL_INLINE cfn_hal_error_code_t cfn_hal_eth_init(cfn_hal_eth_t *driver)
{
    if (!driver)
    {
        return CFN_HAL_ERROR_BAD_PARAM;
    }
    driver->base.vmt           = (const struct cfn_hal_api_base_s *) driver->api;
    cfn_hal_error_code_t error = cfn_hal_eth_config_validate(driver, driver->config);
    if (error != CFN_HAL_ERROR_OK)
    {
        return error;
    }
    return cfn_hal_base_init(&driver->base, CFN_HAL_PERIPHERAL_TYPE_ETH);
}
 
CFN_HAL_INLINE cfn_hal_error_code_t cfn_hal_eth_deinit(cfn_hal_eth_t *driver)
{
    if (!driver)
    {
        return CFN_HAL_ERROR_BAD_PARAM;
    }
    return cfn_hal_base_deinit(&driver->base, CFN_HAL_PERIPHERAL_TYPE_ETH);
}
 
CFN_HAL_INLINE cfn_hal_error_code_t cfn_hal_eth_config_set(cfn_hal_eth_t *driver, const cfn_hal_eth_config_t *config)
{
    if (!driver)
    {
        return CFN_HAL_ERROR_BAD_PARAM;
    }
    cfn_hal_error_code_t error = cfn_hal_eth_config_validate(driver, config);
    if (error != CFN_HAL_ERROR_OK)
    {
        return error;
    }
    {
        driver->config = config;
    }
    return cfn_hal_base_config_set(&driver->base, CFN_HAL_PERIPHERAL_TYPE_ETH, (const void *) config);
}
 
CFN_HAL_INLINE cfn_hal_error_code_t cfn_hal_eth_config_get(cfn_hal_eth_t *driver, cfn_hal_eth_config_t *config)
{
    if (!driver || !config || !driver->config)
    {
        return CFN_HAL_ERROR_BAD_PARAM;
    }
    *config = *(driver->config);
    return CFN_HAL_ERROR_OK;
}
 
CFN_HAL_INLINE cfn_hal_error_code_t cfn_hal_eth_callback_register(cfn_hal_eth_t               *driver,
                                                                  const cfn_hal_eth_callback_t callback,
                                                                  void                        *user_arg)
{
    if (!driver)
    {
        return CFN_HAL_ERROR_BAD_PARAM;
    }
    {
        driver->cb          = callback;
        driver->cb_user_arg = user_arg;
    }
    return cfn_hal_base_callback_register(
        &driver->base, CFN_HAL_PERIPHERAL_TYPE_ETH, (cfn_hal_callback_t) callback, user_arg);
}
 
CFN_HAL_INLINE cfn_hal_error_code_t cfn_hal_eth_power_state_set(cfn_hal_eth_t *driver, cfn_hal_power_state_t state)
{
    if (!driver)
    {
        return CFN_HAL_ERROR_BAD_PARAM;
    }
    return cfn_hal_power_state_set(&driver->base, CFN_HAL_PERIPHERAL_TYPE_ETH, state);
}
 
CFN_HAL_INLINE cfn_hal_error_code_t cfn_hal_eth_event_enable(cfn_hal_eth_t *driver, uint32_t event_mask)
{
    if (!driver)
    {
        return CFN_HAL_ERROR_BAD_PARAM;
    }
    return cfn_hal_base_event_enable(&driver->base, CFN_HAL_PERIPHERAL_TYPE_ETH, event_mask);
}
 
CFN_HAL_INLINE cfn_hal_error_code_t cfn_hal_eth_event_disable(cfn_hal_eth_t *driver, uint32_t event_mask)
{
    if (!driver)
    {
        return CFN_HAL_ERROR_BAD_PARAM;
    }
    return cfn_hal_base_event_disable(&driver->base, CFN_HAL_PERIPHERAL_TYPE_ETH, event_mask);
}
 
CFN_HAL_INLINE cfn_hal_error_code_t cfn_hal_eth_event_get(cfn_hal_eth_t *driver, uint32_t *event_mask)
{
    if (!driver)
    {
        return CFN_HAL_ERROR_BAD_PARAM;
    }
    return cfn_hal_base_event_get(&driver->base, CFN_HAL_PERIPHERAL_TYPE_ETH, event_mask);
}
 
CFN_HAL_INLINE cfn_hal_error_code_t cfn_hal_eth_error_enable(cfn_hal_eth_t *driver, uint32_t error_mask)
{
    if (!driver)
    {
        return CFN_HAL_ERROR_BAD_PARAM;
    }
    return cfn_hal_base_error_enable(&driver->base, CFN_HAL_PERIPHERAL_TYPE_ETH, error_mask);
}
 
CFN_HAL_INLINE cfn_hal_error_code_t cfn_hal_eth_error_disable(cfn_hal_eth_t *driver, uint32_t error_mask)
{
    if (!driver)
    {
        return CFN_HAL_ERROR_BAD_PARAM;
    }
    return cfn_hal_base_error_disable(&driver->base, CFN_HAL_PERIPHERAL_TYPE_ETH, error_mask);
}
 
CFN_HAL_INLINE cfn_hal_error_code_t cfn_hal_eth_error_get(cfn_hal_eth_t *driver, uint32_t *error_mask)
{
    if (!driver)
    {
        return CFN_HAL_ERROR_BAD_PARAM;
    }
    return cfn_hal_base_error_get(&driver->base, CFN_HAL_PERIPHERAL_TYPE_ETH, error_mask);
}
 
/* ETH Specific Functions ------------------------------------------- */
 
CFN_HAL_INLINE cfn_hal_error_code_t cfn_hal_eth_start(cfn_hal_eth_t *driver)
{
    cfn_hal_error_code_t error = CFN_HAL_ERROR_OK;
    CFN_HAL_CHECK_AND_CALL_FUNC(CFN_HAL_PERIPHERAL_TYPE_ETH, start, driver, error);
    return error;
}
 
CFN_HAL_INLINE cfn_hal_error_code_t cfn_hal_eth_stop(cfn_hal_eth_t *driver)
{
    cfn_hal_error_code_t error = CFN_HAL_ERROR_OK;
    CFN_HAL_CHECK_AND_CALL_FUNC(CFN_HAL_PERIPHERAL_TYPE_ETH, stop, driver, error);
    return error;
}
 
CFN_HAL_INLINE cfn_hal_error_code_t cfn_hal_eth_transmit_frame(cfn_hal_eth_t *driver,
                                                               const uint8_t *frame,
                                                               size_t         length,
                                                               uint32_t       timeout)
{
    cfn_hal_error_code_t error = CFN_HAL_ERROR_OK;
    CFN_HAL_CHECK_AND_CALL_FUNC_VARG(
        CFN_HAL_PERIPHERAL_TYPE_ETH, transmit_frame, driver, error, frame, length, timeout);
    return error;
}
 
CFN_HAL_INLINE cfn_hal_error_code_t cfn_hal_eth_receive_frame(
    cfn_hal_eth_t *driver, uint8_t *buffer, size_t max_length, size_t *received_length, uint32_t timeout)
{
    cfn_hal_error_code_t error = CFN_HAL_ERROR_OK;
    CFN_HAL_CHECK_AND_CALL_FUNC_VARG(
        CFN_HAL_PERIPHERAL_TYPE_ETH, receive_frame, driver, error, buffer, max_length, received_length, timeout);
    return error;
}
 
CFN_HAL_INLINE cfn_hal_error_code_t
cfn_hal_eth_read_phy_reg(cfn_hal_eth_t *driver, uint16_t phy_addr, uint16_t reg_addr, uint16_t *value, uint32_t timeout)
{
    cfn_hal_error_code_t error = CFN_HAL_ERROR_OK;
    CFN_HAL_CHECK_AND_CALL_FUNC_VARG(
        CFN_HAL_PERIPHERAL_TYPE_ETH, read_phy_reg, driver, error, phy_addr, reg_addr, value, timeout);
    return error;
}
 
CFN_HAL_INLINE cfn_hal_error_code_t
cfn_hal_eth_write_phy_reg(cfn_hal_eth_t *driver, uint16_t phy_addr, uint16_t reg_addr, uint16_t value, uint32_t timeout)
{
    cfn_hal_error_code_t error = CFN_HAL_ERROR_OK;
    CFN_HAL_CHECK_AND_CALL_FUNC_VARG(
        CFN_HAL_PERIPHERAL_TYPE_ETH, write_phy_reg, driver, error, phy_addr, reg_addr, value, timeout);
    return error;
}
 
CFN_HAL_INLINE cfn_hal_error_code_t cfn_hal_eth_get_link_status(cfn_hal_eth_t             *driver,
                                                                cfn_hal_eth_link_status_t *status,
                                                                uint32_t                   timeout)
{
    cfn_hal_error_code_t error = CFN_HAL_ERROR_OK;
    CFN_HAL_CHECK_AND_CALL_FUNC_VARG(CFN_HAL_PERIPHERAL_TYPE_ETH, get_link_status, driver, error, status, timeout);
    return error;
}
cfn_hal_error_code_t cfn_hal_eth_construct(cfn_hal_eth_t              *driver,
                                           const cfn_hal_eth_config_t *config,
                                           const cfn_hal_eth_phy_t    *phy,
                                           struct cfn_hal_clock_s     *clock,
                                           void                       *dependency,
                                           cfn_hal_eth_callback_t      callback,
                                           void                       *user_arg);
cfn_hal_error_code_t cfn_hal_eth_destruct(cfn_hal_eth_t *driver);
 
#ifdef __cplusplus
}
#endif
 
#endif // CAFFEINE_HAL_HAL_DAC_H